Memory subsystem with disk meshing, controller meshing, and efficient cache buffer lookup

摘要: In a data processing system, source block addresses are linearly mapped to virtual linear target disks equal in size actual physical comprised by the long-term storage. Blocks of then assigned disk-meshed whereby each within set adjacently addressed disk blocks is separate disk. Controller meshing may be performed assigning controller-meshed which will comprise disk, respective sets disks, all having same controller, equal-sized located on different controllers. Additional mechanisms that provided system include efficient cache buffer lookup linked lists, and mechanism for accelerating an ancillary ignoring delay time.