High Efficiency Power Amplifier Architectures for RF Applications
作者： Avanindra Madisetti , Tommy Yu
DOI:
关键词:
摘要: A parallel delta sigma modulator architecture is disclosed. The includes a signal demultiplexer configured to receive an input and demultiplex the output plurality of streams, modulators executing in parallel, each stream from streams generate modulated output, multiplexer outputs multiplex together into pulse train.
lens.org 参考文章(123)
David Alldred, Zhao Li, System and method of improving stability of continuous-time delta-sigma modulators ,(2013)
Yun-Shiang Shu, Delta-sigma analog-to-digital converter with error suppression ,(2013)
Leonard Joseph Cimini, Babak Daneshrad, Nelson Ray Sollenberger, Clustered OFDM communication system ,(1996)
Christopher Pagnanelli, Conversion of a discrete time quantized signal into a continuous time, continuously variable signal ,(2016)
Shuja Hussain Andrabi, Hashem Zare-Hoseini, Spur reduction circuit ,(2012)
John L. Melanson, Delta-sigma analog-to-digital converter (adc) having a serialized quantizer output ,(2009)
Christopher Pagnanelli, Sampling/quantization converters ,(2011)
Daniel Yap, Henrik T. Jensen, Optically sampled delta-sigma modulator ,(2002)
Maher Kayal, Patrick Clement, Sergio Pesenti, Electronic device and integrated circuit comprising a delta-sigma converter and method therefor ,(2006)