Memory accessing device for a pipeline information processing system

作者: Koichi Kuroiwa , Kenji Shirasawa , Hiromasa Takahashi , Hideyuki Iino , Hiroyuki Fujiyama

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摘要: A memory accessing device is connected to a central processing unit and via common bus. The accesses the independently of unit. includes an address generating for address, control outputting generated bus, controlling suspend or terminate access controlled in pipeline mode when internally externally issues request suspension termination mode. terminates suspends it receives access.

参考文章(8)
Michael Fuccio, Benjamin Ng, Hardware Architecture Considerations in the WE32100 Chip Set IEEE Micro. ,vol. 6, pp. 29- 46 ,(1986) , 10.1109/MM.1986.304741
J.E. Smith, A.R. Pleszkun, Implementing precise interrupts in pipelined processors IEEE Transactions on Computers. ,vol. 37, pp. 562- 573 ,(1988) , 10.1109/12.4607
John E. Zolnowsky, Douglas B. MacGregor, Marvin A. Mills, William C. Moyer, Virtual machine data processor ,(1983)
David A. Orbits, Wayne Cardoza, David N. Cutler, Dileep Bhandarkar, Richard T. Witek, Apparatus and method for recovering from page faults in vector data processing operations ,(1988)
Tadaaki Bandoh, Hidekazu Matsumoto, Soichi Takaya, Jushi Ide, Yukio Kawamoto, Hirokazu Hirayama, Takayuki Morioka, Shinichiro Yamaguchi, Yoshihiro Miyazaki, Suspended instruction restart processing system based on a checkpoint microprogram address ,(1987)
Ikuya Kawasaki, Makoto Hanawa, Tadahiko Nishimukai, Microprocessor for retrying data transfer ,(1987)
Hiroaki Fukumaru, Siochi Takaya, Daniel M. McCarthy, Yoshihiro Miyazaki, Data processing device with common memory connecting mechanism ,(1991)