作者: Sungwook Yu , E.E. Swartziander
DOI: 10.1109/12.954513
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摘要: This paper presents an efficient method for implementing the Discrete Cosine Transform (DCT) with distributed arithmetic. While conventional approaches use original DCT algorithm or even-odd frequency decomposition of algorithm, proposed architecture uses recursive and requires less area than approaches, regardless memory reduction techniques employed in ROM Accumulators (RACs). An scaled arithmetic is also proposed. The new even while keeping same structural regularity easy VLSI implementation. A comparison synthesized processors shows that reduces hardware regular by 17 percent 23 percent, respectively, relative to a design. With row-column method, architectures can be easily extended compute two-dimensional required many image compression applications such as HDTV.