作者: Kevin Skadron , Karthik Sankaranarayanan , Dharmesh Parikh , Mircea Stan , Yan Zhang
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摘要: This report introduces HotLeakage, an architectural model for subthreshold and gate leakage that we have developed here at the University of Virginia. The most important features HotLeakage are explicit inclusion temperature, voltage, leakage, parameter variations, ability to recalculate currents dynamically as temperature voltage change due operating conditions, DVS techniques, etc. provides default settings 180nm through 70nm technologies modeling cache register files, a simple interface selecting alternate values alternative microarchitecture structures. It also models several extant control with adding further techniques. is currently semi-independent module use SimpleScalar, but sufficiently modular it should be fairly easy port other simulators. Because sub-threshold exponentially dependent on because growing so rapidly, variations can profound effect simulation accuracy, hope will serve useful tool microarchitects more accurately evaluate issues related power. available download athttp://lava.cs.virginia.edu/HotLeakage