On the Reconfigurability of All-Digital Phase-Locked Loops for Software Defined Radios
作者： Ioannis L. Syllaios , Poras T. Balsara , Robert Bogdan Staszewski
DOI: 10.1109/PIMRC.2007.4394091
关键词:
摘要: A new all-digital phase-locked loop (ADPLL) for wireless applications has recently been proposed and commercially demonstrated. It replaces conventional phase/frequency detector charge pump with a time-to-digital converter (TDC). Analog frequency tuning of VCO is replaced an all- digital digitally-controlled oscillator (DCO). Due to its intensive structure, the ADPLL well suited single-chip radio solutions fabricated using state-of-the- art low cost power nanometer-scale CMOS processes. Being integrated signal processor (DSP), parameters can be properly controlled seamlessly reconfigured available on-chip DSP unit making software defined (SDR) platform. In this paper, we present based technique fully dynamic control settling performance that allows band width widened or narrowed allowing fast acquisition tracking excellent phase noise spurious performance, respectively. The arbitrary synthesizer bandwidth will address dynamically varying nature multi-radio multi- standard SDR environment.
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