Power regulator circuitry for programmable logic device memory elements

作者: William Bradley Vest , Ping-Chen Liu , Thien Le

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摘要: Power regulator circuitry for programmable memory elements on logic device integrated circuits is provided. The may each include a storage element formed from cross-coupled inverters and an address transistor. Address drivers be used to supply signals the transistors. power circuit that produces time-varying voltage provide voltages in elements. Unity gain buffers distribute reference bandgap circuits. use dividers p-channel metal-oxide-semiconductor control

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