Operating systems abstractions for software packet processing in datacenters

摘要: Over the past decade, modern datacenter has reshaped computing landscape by providing a large scale consolidated platform that efficiently powers online services, financial, military, scientific, and other application domains. The fundamental principle at core of design is to provide highly available, high performance storage infrastructure while relying solely on low cost, commodity components. Further, in few years, entire datacenters have become themselves, are increasingly being networked with each through speed optical networks for load balancing fault tolerance. Therefore, network substrate key component virtually all operations within between rely on. Although fast provisioned amounts capacity spare, applications find it difficult derive expected levels performance. In essence, consist inexpensive, fault-prone components running operating systems protocols ill-suited reliable, high-performance applications. This thesis addresses several challenges pertaining communication datacenter. First, this provides study properties end-host servers connected over bandwidth, uncongested, long distance lambda networks. We identify scenarios associated loss, latency variations, degraded throughput attached servers. Interestingly, we show indeed uncongested loss very rare, significant observed end-hosts themselves—a scenario both common easily provoked. One technology used overcome such poor packet processors carry out some sort enhancement protocol. Second, shows how may be improve datacenter’s layer. these can built software run resident sustain data rates. And third, extends system two novel processing abstractions—the Featherweight Pipes ( fwP) NetSlices. Developers use new abstractions build user-space, without incurring penalty conventional engender. Most importantly, unlike abstractions, fwP NetSlices allow achieve rates leveraging parallelism intrinsic hardware, like multi-core multi-queue interfaces. feature enables independent work proceed parallel aggressively minimizing overheads during contention phases. demonstrate linearly number available processor cores.