An introduction to assertional reasoning for concurrent systems

作者: A. Udaya Shankar

DOI: 10.1145/158439.158441

关键词:

摘要: This is a tutorial introduction to assertional reasoning based on temporal logic. The objective provide working familiarity with the technique. We use simple system model and proof system, we keep minimum treatment of issues such as soundness, completeness, compositionality, abstraction. concurrent by state transition fairness requirements. reason about systems using Hoare logic subset linear-time logic, specifically, invariant assertions leads-to assertions. apply method several examples.

参考文章(52)
Simon S. Lam, A. U Shankar, An HDLC Protocol and Its Verification Using Image Protocols University of Texas at Austin. ,(1982)
Nicolien J. Drost, J. Leeuwen, Assertional verification of a majority consensus algorithm for concurrency control in multiple copy international conference on concurrency theory. pp. 320- 334 ,(1988) , 10.1007/3-540-50403-6_48
Edsger W. Dijkstra, A Correctness Proof for Communicating Processes: A Small Exercise Springer, New York, NY. pp. 259- 263 ,(1982) , 10.1007/978-1-4612-5695-3_47
Gerard Tel, Assertional Verification of a Timer Based Protocol international colloquium on automata languages and programming. pp. 600- 614 ,(1988) , 10.1007/3-540-19488-6_145
Fred B. Schneider, Gregory R. Andrews, Concepts for concurrent programming Current trends in concurrency. Overviews and tutorials. pp. 669- 716 ,(1986) , 10.1007/BFB0027049
D. Lehmann, A. Pnueli, J. Stavi, Impartiality, Justice and Fairness: The Ethics of Concurrent Termination international colloquium on automata, languages and programming. pp. 264- 277 ,(1981) , 10.1007/3-540-10843-2_22
Cengiz Alaettinoğlu, A. Udaya Shankar, Stepwise Assertional Design of Distance-Vector Routing Algorithms Proceedings of the IFIP TC6/WG6.1 Twelth International Symposium on Protocol Specification, Testing and Verification XII. pp. 399- 413 ,(1992) , 10.1016/B978-0-444-89874-6.50031-3
Susan Owicki, David Gries, An axiomatic proof technique for parallel programs I Acta Informatica. ,vol. 6, pp. 319- 340 ,(1976) , 10.1007/BF00268134