On analog decoders and digitally corrected converters

摘要: In recent years, the demand for efficient and reliable communication networks has greatly increased. To satisfy this need, powerful error correcting codes were introduced. The (iterative) algorithms used decoding such modern are computationally very demanding need great computing power to deliver real-time results. Mobile users, however, ask low-power electronics; combination of both demands led an increased interest in analog circuits, e.g., decoders codes. first part thesis discusses various implementations decoders. An decoder can be understood as a coderepresenting (factor) graph mapped on silicon, whereas algorithm (e.g., sum-product algorithm) corresponds settling behavior circuit. performance gain compared digital terms speed or power-consumption is believed at least factor 100. following discussed: Hamming built out two generations discrete softgates, integrated Reed-Muller presented. extensive collection measured error-rate curves all under operating conditions prove their full functionality demonstrate transistor mismatch. Furthermore, novel circuit compute soft symbols PAM QAM signal This simple network blends nicely with decoders—its outputs currents proportional symbol-likelihoods. vii