Stereolithographic method for applying materials to electronic component substrates and resulting structures

摘要: A stereolithographic method of applying material to preformed electronic components and resulting structures. substrate used for effecting electrical testing semiconductor dice or a carrier same may be provided with protective structure in the form at least one layer segment dielectric having controlled thickness depth. The include precisely sized, shaped located apertures through which conductive terminals on surface accessed. Dielectric also employed as mechanically align die either partially receive connective elements die, an alignment comprising upwardly projecting adjacent bracketing intended location substrate, both.