Monitoring coverage for static modelling of an electronic device

作者: Huy Nguyen , Alan J. Carlin , Hugo M. Cavalcanti

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摘要: A design verification system automatically identifies coverage of different constraints for a static model an electronic device. The can be employed by tool, referred to as solver, that whether the mathematical relationships reconciled, given set user-defined indicate desired configuration, or range configurations, After solution particular has been identified, adjustment module identify, based on information generated if other sets were implicitly solved solver. If such solved, adjustments mark they will omitted from used subsequent solutions

参考文章(23)
Robert Eldredge Currie, Assimakis Tzamaloukas, System and method for identifying portions of roads ,(2008)
Michael Thomas York Mcnamara, David Todd Massey, Chong Guan Tan, System and method for automated design verification ,(1998)
Jeffrey Hammes, Lisa Krause, Jon Steidel, Daniel Poznanovic, System and method for partitioning control-dataflow graph representations ,(2003)
R. Arora, M.S. Hsiao, Enhancing SAT-based equivalence checking with static logic implications high level design validation and test. pp. 63- 68 ,(2003) , 10.1109/HLDVT.2003.1252476