BLAS: Block-level adaptive striping for solid-state drives

作者: Hsin-Hung Chen , Dau-Jieu Yang , Hsung-Pin Chang , Da-Wei Chang

DOI: 10.1145/2555616

关键词:

摘要: Increasing the degree of parallelism and reducing overhead garbage collection (GC overhead) are two keys to enhancing performance solid-state drives (SSDs). SSDs employ multichannel architectures, a data placement scheme in an SSD determines how striped channels. Without considering access pattern, existing fixed device-level schemes may have either high GC or poor I/O parallelism, resulting degraded performance. In this article, adaptive block-level called BLAS is proposed maximize while simultaneously minimizing overhead. contrast schemes, allows different policies for blocks with patterns. Pages read-intensive scattered over various channels read pages each remaining attempted be gathered same physical block minimize Moreover, policy logical changed dynamically according pattern changes that block. Finally, parallelism-aware write buffer management approach adopted parallelism. Performance results show yields significant improvement response time when compared schemes. particular, outperforms page striping by factors up 8.75 7.41, respectively. achieves low effective adapting workload changes.

参考文章(29)
Seongjun Ahn, Hyojun Kim, BPLRU: a buffer management scheme for improving random writes in flash storage file and storage technologies. pp. 16- ,(2008)
J. Ryu, Y. Joo, S. Park, H. Shin, K.G. Shin, Exploiting SSD parallelism to accelerate application launch on SSDs Electronics Letters. ,vol. 47, pp. 313- 315 ,(2011) , 10.1049/EL.2011.0042
Jia-Hao Wang, Hsin-Hung Chen, Wei-Jian Su, Da-Wei Chang, Cross-Layer Optimizations in Solid-State Drives IEEE Embedded Systems Letters. ,vol. 3, pp. 109- 112 ,(2011) , 10.1109/LES.2011.2168941
Dawoon Jung, Jeong-UK Kang, Heeseung Jo, Jin-Soo Kim, Joonwon Lee, Superblock FTL: A superblock-based flash translation layer with a hybrid address translation scheme ACM Transactions in Embedded Computing Systems. ,vol. 9, pp. 40- ,(2010) , 10.1145/1721695.1721706
Li-Pin Chang, Chun-Da Du, Design and implementation of an efficient wear-leveling algorithm for solid-state-disk microcontrollers ACM Transactions on Design Automation of Electronic Systems. ,vol. 15, pp. 1- 36 ,(2009) , 10.1145/1640457.1640463
Sungjin Lee, Dongkun Shin, Young-Jin Kim, Jihong Kim, LAST ACM SIGOPS Operating Systems Review. ,vol. 42, pp. 36- 42 ,(2008) , 10.1145/1453775.1453783
Yang Hu, Hong Jiang, Dan Feng, Lei Tian, Hao Luo, Shuping Zhang, Performance impact and interplay of SSD parallelism through advanced commands, allocation strategy and data granularity Proceedings of the international conference on Supercomputing - ICS '11. pp. 96- 107 ,(2011) , 10.1145/1995896.1995912
Chin-Hsien Wu, Tei-Wei Kuo, An adaptive two-level management for the flash translation layer in embedded systems international conference on computer aided design. pp. 601- 606 ,(2006) , 10.1145/1233501.1233624
Hyunchul Park, Dongkun Shin, Buffer flush and address mapping scheme for flash memory solid-state disk Journal of Systems Architecture. ,vol. 56, pp. 208- 220 ,(2010) , 10.1016/J.SYSARC.2010.03.006
Chin-Hsien Wu, A self-adjusting flash translation layer for resource-limited embedded systems ACM Transactions in Embedded Computing Systems. ,vol. 9, pp. 31- ,(2010) , 10.1145/1721695.1721697