作者: A. Jiraseree-amornkun , A. Worapishet , E. Klumperink , B. Nauta , W. Surakampontorn
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摘要: In this paper, an in-depth analysis of switched-resistor (S-R) techniques for implementing low-voltage low-distortion tunable active-RC filters is presented. The S-R make use switch(es) with duty-cycle-controlled clock(s) to achieve tunability the effective resistance and, hence, RC time constant. characteristics two networks utilizing one set (S-1R) and sets (S-2R) switch resistor combinations are analyzed. It will be shown that S-2R network outperforms S-1R counterpart in terms finite-slew-rate-induced distortion, frequency translation, noise performance. order extend tuning range, bank scheme also described. theoretical was verified by experiment on a 100-kHz first-order filter prototype, implemented using discrete elements, where several advantages over demonstrated. Simulations 10-MHz low-pass based standard 0.18- mum CMOS process included performance comparison practical on-chip implementations.