An on-chip network architecture for hard real time systems

摘要: With the current trend in integration of more complex systems on chip there is a need for better communication infrastructure that will increase available bandwidth and simplify interface verification. We have previously proposed circuit switched two-dimensional mesh network known as SoCBUS increases performance lowers cost In this paper, explained together with working principles transaction handling. also introduce concept packet connected circuit, PCC, where through locking it goes. PCC deadlock free does not impose any unnecessary restrictions system while being simple efficient implementation. uses scheme to set up routes network. possible application, telephone voice-over-IP gateway, use show very good properties bandwidth, latency, complexity when used hard real time scheduling traffic. The simulations analysis application certain setup can handle 48000 channels voice data including buffer swapping single chip. suitable general purpose computing platforms exhibit random traffic patterns but acceptable mainly local.