作者: Hideharu Koike
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摘要: A voltage divider circuit comprises first and second transistor pairs 1 2 connected in series between a standard terminal VD VS, feedback control 3. Each of two NMOS transistors with the same electric characteristics, respectively. divided ratio is set by applied to gate terminals these M1-M4. Feedback-control 3 load pair 4 an operational amplifier OP1. The performs feedback-control so that connection lines L1 L2 which connects becomes equal. Therefore, high accurate outputted from transistors.