System and method for analyzing power consumption of electronic design undergoing emulation or hardware based simulation acceleration

摘要: The invention described here is the methods of using a hardware-based functional verification system to mimic design under test (DUT), intended application environment and software, record or derive transition activities all circuits DUT, then calculate total partial power consumption during period interest. interest defined by user in terms “events” which are arbitrary states DUT. Furthermore, can specify number sub-divisions required between events thus vary apparent resolution profile.