作者: Hideki Matsuura
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摘要: In a quadrature amplitude modulation signal demodulation circuit including first and second delay circuits for receiving an I-axis component Q-axis of baseband signal, tap coefficient calculating coefficients in accordance with the delayed component, interference detection detecting center included control controlling time periods output circuit, equalizers coefficients, adder adding signals transversal equalizers, is constructed by plurality absolute value adders, each one having same timing, comparator comparing values adders other.