Metal interconnect structure and method

摘要: A method of fabricating a semiconductor device including metal interconnect structure with conductive region formed in first dielectric layer, and an overlying, low-k, layer. via trench are dual damascene the overlying aligned trench. sacrificial liner to release organic residues is deposited over upper surface wafer, which planarization layer deposited. The removed dry plasma etch, followed by wet clean remove liner. diffusion barrier separate material from layers wafer. polished form even for further processing steps.