A hardware efficient chaotic ring oscillator based true random number generator

摘要: In this work, we present a hardware efficient chaotic ring oscillator based true random number generator in multiple sampling topology. Recently introduced generators use significant of rings for accumulating available jitter to useful level. They require large silicon area and consume considerable amount power dissipation whereas, the proposed circuit can boost by factor 178 with only few components. The simplicity offers high integration potential inherent low consumption advantages over conventional designs. Random numbers generated proof concept prototype passed all NIST statistical tests without any post processing.