作者: Ashok K. Kapoor , Asen Asenov
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摘要: Variation resistant metal-oxide-semiconductor field effect transistors (MOSFET) are manufactured using a high-K, metal-gate ‘channel-last’ process. Between spacers formed over well area having separate drain and source areas, recess in the underlying is crystallographic etch to provide [111] boundaries adjacent regions. An ion implant step localized by cavity results increase well-doping directly beneath recess. Within recess, an active region un-doped or lightly doped epitaxial layer, deposited at very low temperature. A high-K dielectric stack which metal gate within boundaries.