作者: Weizhong Chen
DOI:
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摘要: A receiver architecture includes a selectivity filter (206) for selectively passing wanted channel and rejecting unwanted channels. The has BT of about one-half the transmitter filter. discriminator (208) is coupled to converting received symbols from frequency domain time symbols. symbol recovery processor (210) recovering through two-state maximum likelihood sequence estimation (MLSE) technique in which templates are optimized with substantially less than