VLSI architecture for a Reed-Solomon decoder
作者： In-Shek Hsu , Trieu-Kie Truong
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摘要: A basic single-chip building block for a RS decoder system is partitioned into plurality of sections the first which consists syndrome subcells each contains identical standard-basis finite-field multipliers that are programmable between 10-bit and 8-bit operation. desired number blocks may be assembled to provide any subcell size
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