作者: Charles R. Lefurgy , Bishop C. Brock , Malcolm S. Ware , John B. Carter , Alan J. Drake
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摘要: A performance control technique for a processing system that includes one or more adaptively-clocked processor cores provides improved performance/power characteristics. An outer feedback loop adjusts the power supply voltage(s) provided to voltage domain(s) powering core(s), which may be on per-core basis include multiple per domain. The operates ensure each core is meeting specified performance, while also an inner their clock other mechanism maximize under present operating conditions and within margin of safety. measured compared target performance. If not met in domain, raised domain until all meet