Combined circuit switch and packet switching system
作者： Robert William Gebhardt , Edward Bernard Morgan , Gary Joe Grimes , James Joseph Ferenc , Iii. Gabe Alfred Sellers
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摘要: Apparatus (FIG. 3) for and a method of inserting circuit switch information packetized data into different time slots division multiplexed bus (320). A memory (l04C) having location individual to each slot is written with specifying whether the serve or packet data. The readout during occurrence it's associated controllably effects application either bus. Packet can be inserted not presently being used by switch. special bit specify remainder bits represents information. receiving apparatus steer
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