Design of switching frequency limiter for hysteresis current controlled PWM VSI
作者： Youn-Ho Choi , Nae-Soo Cho , Woo-Hyen Kwon , Dong-Ha Lee
DOI: 10.1109/ICCAS.2013.6703968
关键词:
摘要: Stable operation of hysteresis control the inverter output current can be guaranteed by considering system parameter, supply voltage and minimum onJoff time when determining band. In paper, we will discuss characteristics role frequency limiter, implement digital circuit for controlling limiting switching on FPGA base, design limiter which shows stable guaranteeing off device while robust to load changes, compare performance proposed with existing scheme.
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