Parallel optical logic processor and bit slice-full adder using a single electron trapping device

摘要: A new method is proposed for implementing logic operations by using a single electron trapping (ET) device. Based on the storage and erasure characteristics of device, each Boolean operation can be performed corresponding programming. The encoding efficient, since bit spatially encoded pixel. system simple optical elements stacked together, so structure compact. Furthermore, involving three or even more variables realized easily with suggested architecture. All are executed in parallel. As an example, triple-in binary processor demonstrated to perform bit-slice full additions. Experimental results given.