作者: Mohaddeseh Hoveida , Fatemeh Aghaaliakbari , Ramin Bashizade , Mohammad Arjomand , Hamid Sarbazi-Azad
DOI: 10.1145/3055202
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摘要: The failure of Dennard scaling has led to the utilization wall that is source dark silicon and limits percentage a chip can actively switch within given power budget. To address this issue, structure needed guarantee limited budget along with providing sufficient flexibility performance for different applications various communication requirements. In article, we present general-purpose platform future many-core Chip-Multiprocessors (CMPs) benefits from advantages clustering, Network-on-Chip (NoC) resource sharing among cores, gating unused components clusters. We also propose two task mapping methods proposed in which active cores are dispersed appropriately, so an excess be obtained. Our evaluations reveal first second mechanisms respectively reduce execution time by up 28.6% 39.2% NoC consumption 11.1% 10%, gain 7.6% 13.4% over baseline architecture.