作者: Albert M. Bergement , George M. Sardo
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摘要: An array of asymmetric electrically programmable, read only memory (EPROM) cells is formed in a P- semiconductor substrate. The EPROM are virtual ground cells, that there no fixed connections the to potential. Parallel bit lines, comprising N+ substrate regions, form drain and source regions parallel columns MOS transistor devices. Each cell has floating gate on first polysilicon layer, control second layer. line two lateral edge regions. N- implant region overlaps one each line, thereby forming graduated PN junction between channel device. This substantially prevents hot electron generation by enables be programmed without programming its nearest neighboring cell. A other sharp adjacent device, enhancing generation, which makes more efficient.