作者: D. Gogl , C. Arndt , J.C. Barwin , A. Bette , J. DeBrosse
关键词:
摘要: A 16-Mb magnetic random access memory (MRAM) is demonstrated in 0.18-/spl mu/m three-Cu-level CMOS with a three-level MRAM process adder. The chip, the highest density reported to date, utilizes 1.42/spl mu/m/sup 2/ 1-transistor 1-magnetic tunnel junction (1T1MTJ) cell, measures 79 mm/sup and features /spl times/16 asynchronous SRAM-like interface. paper describes architecture, circuit techniques unique multi-Mb design, including novel bootstrapped write driver circuit. Hardware results are presented.