Fault-tolerant cell addressable array

摘要: A small programmable memory means such as an electrically logic array is incorporated on the chip of a conventional bit addressable random access or other cell circuit. The has one more superfluous rows and/or columns cells held in reserve. Processing and testing conducted manner. Chips with faulty are corrected by programming addresses locations. Subsequently, will respond to any these and, through interaction either address decoding input/output logic, cause reserve contents thereof be selected instead cell.