作者: Kuo-Hsing Cheng , Chia-Hung Wei , Shu-Yu Jiang
DOI: 10.1109/ISCAS.2004.1329350
关键词:
摘要: In this paper, a novel Content Addressable Memory (CAM) word structure with divided matching line for low-power application is proposed. To reduce the comparison power consumption, proposed CAM adopts static circuit design to improve overall system reliability and consumption. addition, new cell single bit The requires only one heavy loading line, prevents frequently switching that designed in conventional basic cell. Based on TSMC 0.25 /spl mu/m CMOS process 2.5 V supply voltage, 128 words by 32 bits designed. simulation result shows consumption of 17.12 mW under 300 MHz operation frequency.