A highly flexible, distributed multiprocessor architecture for network processing

作者: Muthu Venkatachalam , Prashant Chandra , Raj Yavatkar

DOI: 10.1016/S1389-1286(02)00450-4

关键词:

摘要: Network processors (NPs) are an emerging field of programmable that optimized to implement data plane packet processing networking functions. Unlike the general-purpose CPUs rely heavily on caching for improving performance, lack locality in and need high-performance I/O have forced designers come up with innovative architectures can hide memory latency while still packets at high rates. Most these NPs use some type multiprocessing combination a hierarchy types achieve performance. In addition, keep arriving rates over multiple incoming media interfaces, NP must perform fast operations such as storage, table lookup, extraction fields headers. We describe architecture uses distributed one or more multithreaded necessary challenges programming processor including issues related consistency maintaining ordering. also present model generic network applications software pipelines. then demonstrate implementing two applications, namely, mapping traffic management algorithms onto implementation gateway based voice-over-AAL2.

参考文章(3)
H. Jonathan Chao, Jun S. Hong, Design of an ATM shaping multiplexer with guaranteed output burstiness Computer Systems: Science & Engineering. ,vol. 12, pp. 131- 141 ,(1997)
S. Floyd, V. Jacobson, Random early detection gateways for congestion avoidance IEEE ACM Transactions on Networking. ,vol. 1, pp. 397- 413 ,(1993) , 10.1109/90.251892