作者: Louis Michael Nigra , Michael Edward Denzin , Gregory Redmond Black
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摘要: A direct modulation phase lock loop (PLL) a voltage controlled oscillator (VCO) (114). divider (118) has first input coupled to the VCO and second receive inducing divisor sequence. detector (102) output thereof, reference input. tuning circuit (306, 406) is VCO, responsive variable DC potential such that frequency response constant over bandwidth whereby PLL type 1 with low distortion.