An efficient FPGA overlay for portable custom instruction set extensions
作者： Dirk Koch , Christian Beckhoff , Guy G. F. Lemieux
关键词:
摘要: … families from different vendors. This allows the execution of a … to a cluster with direct LUT-to-LUT routing within a cluster (… we stop traversing of the already existing path, if we find another …
sci-hub.se 参考文章(14)
Löic Lagadec, Dominique Lavenier, Erwan Fabiani, Bernard Pottier, Placing, Routing, and Editing Virtual FPGAs field programmable logic and applications. pp. 357- 366 ,(2001) , 10.1007/3-540-44687-7_37
André DeHon, Balancing interconnect and computation in a reconfigurable computing array (or, why you don't really want 100% LUT utilization) Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays - FPGA '99. pp. 69- 78 ,(1999) , 10.1145/296399.296431
Eddie Hung, Steven J.E. Wilton, Towards simulator-like observability for FPGAs Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '13. pp. 19- 28 ,(2013) , 10.1145/2435264.2435272
Dirk Koch, Christian Beckhoff, Jim Torresen, Zero logic overhead integration of partially reconfigurable modules symposium on integrated circuits and systems design. pp. 103- 108 ,(2010) , 10.1145/1854153.1854181
Michael J. Wirthlin, Brad L. Hutchings, DISC: the dynamic instruction set computer field programmable gate arrays. ,vol. 2607, pp. 92- 103 ,(1995) , 10.1117/12.221328
P.M. Athanas, H.F. Silverman, Processor reconfiguration through instruction-set metamorphosis IEEE Computer. ,vol. 26, pp. 11- 18 ,(1993) , 10.1109/2.204677
Christian Beckhoff, Dirk Koch, Jim Torresen, The Xilinx Design Language (XDL): Tutorial and use cases 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC). pp. 1- 8 ,(2011) , 10.1109/RECOSOC.2011.5981545
Jonathan Rose, Jason Luu, Chi Wai Yu, Opal Densmore, Jeffrey Goeders, Andrew Somerville, Kenneth B. Kent, Peter Jamieson, Jason Anderson, The VTR project: architecture and CAD for FPGAs from verilog to routing field programmable gate arrays. pp. 77- 86 ,(2012) , 10.1145/2145694.2145708
Alexander Brant, Guy G.F. Lemieux, ZUMA: An Open FPGA Overlay Architecture 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines. pp. 93- 96 ,(2012) , 10.1109/FCCM.2012.25
Christian Beckhoff, Dirk Koch, Jim Torresen, Short-Circuits on FPGAs Caused by Partial Runtime Reconfiguration field-programmable logic and applications. pp. 596- 601 ,(2010) , 10.1109/FPL.2010.117