Trilayer microlithographic process using a silicon-based resist as the middle layer
作者： Cesar M. Garza , Monte A. Douglas , Roland Johnson
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摘要: A method for patterning an integrated circuit workpiece (10) includes forming a first layer (16) of organic material on the surface to depth sufficient allow substantially planar outer (36) thereof. second, polysilane-based resist (22) is spin-deposited (16). third resolution (24) deposited second (22). The selectively exposed and developed using standard techniques. pattern in transferred polysilane by either exposure deep ultraviolet or fluorine-base RIE etch. This followed oxygen-based etch transfer (18) (10).
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