作者: Minsuk Lee , Sang Lyul Min , Heonshik Shin , Chong Sang Kim , Chang Yun Park
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摘要: Cache memories have been extensively used to bridge the speed gap between high processors and relatively slow main memory. However, they are not widely in real-time systems due their unpredictable performance. This paper proposes an instruction prefetching scheme called threaded as alternative caching systems. In proposed prefetching, block pointer a thread is assigned each memory made point next on worst case execution path that determined by compile-time analysis. Also, updated throughout entire program guarantee predictability. also compares performances of various previous schemes with prefetching. By analyzing several benchmark programs, we show performance significantly better than those schemes. The results when size large enough almost good cache 100 % hit ratio.