Data transfer using bus address lines

作者: David William Siegel , Ravi Kumar Arimilli , Sudhir Dhawan , James Otto Nicholson

DOI:

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摘要: A computer system can transfer data between a master subsystem and slave on bus address lines as well during high speed transfer. Data is clocked the by clock signal which separate from normal signal. transferred at maximum rate be handled both subsystem.

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