Processing resource allocation within an integrated circuit supporting transaction requests of different priority levels

作者: Brett Stanley Feero , Mark David Werkheiser , Ramamoorthy Guru Prasadh , Jamshed Jalal , Michael Alan Filippo

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摘要: An integrated circuit 2 includes a plurality of transaction sources 6, 8, 10, 12, 14, 16, 18, 20 communicating via ring-based interconnect 30 with shared caches 22, 24 each having an associated POC/POS 30, 34 and serving as request servicing circuit. The circuits have set processing resources 36 that may be allocated to different transactions. These either dynamically or statically. Static allocation can made in dependence upon selection algorithm. This algorithm use quality service value/priority level one its input variables. A starvation ratio also defined such lower priority levels are forced selected if they starved for too long. programmable mapping between values levels. maximum number programmed.

参考文章(100)
Akira Hattori, Hidehiko Nishida, Minoru Koshino, Masanori Takahashi, Access request control apparatus which reassigns higher priority to incomplete access requests ,(1986)
Jaya Prakash Subramaniam Ganasan, Joshua Hirsch Stubbs, Simon Booth, Mark Michael Schaffer, Vinod Chamarty, Cristian Duroiu, Moinul Khan, Kris Tiri, Serag GadelRab, Robert Nicholson Gibson, Bohuslav Rychlik, Arbitrating bus transactions on a communications bus based on bus device health information and related power management ,(2011)
Yuji Mizote, Kiyoshi Takahara, Computer allocation method ,(2006)
Mandar Nadgir, Avinash Pandey, Chandan Basu, System For Parallel Computing ,(2009)
Krishnan Srinivasan, Chien-Chun Chou, Drew E. Wingard, Ruben Khazhakyan, Harutyan Aslanyan, Apparatus and methods to concurrently perform per-thread as well as per-tag memory access scheduling within a thread and across two or more threads ,(2010)
Sayantan Chakravorty, Gregory Burgess, Colin Watson, Joshua B. Barnard, Compute cluster with balanced resources ,(2010)
William C. Moyer, William C. Bruce, Afzal M. Malik, Data processing system having an adaptive priority controller ,(2002)
Moshe E. Matsa, Oleg Levin, Sonjeev Jahagirdar, Variable increment real-time status counters ,(2010)