作者: Jesus Andres Saenz , Lewis Clark Eggebrecht
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摘要: A serial keyboard interface (28) connects a self scanning programmable serialized (40) to the system bus (10) of data processing system. cable (42) containing only clock wire (52) and (58) provides connection. The transmits 9-bit scan out code consisting start bit followed by eight bits. line is connected or shift terminal serial-to-parallel register encoder (62) for shifting bits on into which has parallel output lines (A, B . G, H) bus. When contains complete frame, in most significant stage (h') sets D-type latch (68) apply CPU interrupt request (10). At this time, Q pulls down ground potential, thereby disabling preventing further transmission data. granted CPU, clear signal resets remove potential from permit