Timer with dynamic reset threshold

摘要: A timing vernier repeatedly generates a output signal, which includes event such as state transition, pulse, etc. Unlike prior verniers, the present is capable of significantly faster repetition rates. After ramp signal initiated responsive to trigger it changes from predetermined starting level at substantially linear rate. digital-to-analog converter (DAC) provides an analog select and reset digital signal. The represents current offset by amount. comparator, coupled DAC, produces when reaches Thus, greater signals cause earlier events, whereas lesser result in later events. delay directly proportional threshold sensor, ramp's Since automatically adjusted be fixed early possible, without waiting for finish its course.