作者: Giovanni Pennelli , Massimo Piotto
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摘要: Direct patterning of silicon dioxide by electron beam lithography is used for the definition metal nanojunction on wires fabricated insulator (SOI) substrates. Devices based a single nanowire as small 15 nm and several micrometers long are means top down process lithography, anisotropic etching thermal oxidation. A gate defined over nanoscale opening into surrounding wire obtained stimulated oxide etching. The behavior device like junction field effect transistor (SiNW-JFET) confirmed electrical characterization at room temperature.