作者: Junya Matsuno , Masanori Furuta , Tetsuro Itakura
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摘要: The first amplifier operates according a clock, changes voltages of terminal and second from fixed voltage to an input signal reference voltage, respectively, when on period clock starts, keeps the terminals at after reach until ends, comparator generates logic signals that have logical levels different each other, based difference between whose least partially overlaps with starts.