Multi/demultiplexing in Gbit/s range using dual gate GaAs m.e.s.f.e.t.s

摘要: Multiplexing from 1 to 2 Gbit/s and corresponding demultiplexing including clock regeneration pulse width reduction has been performed using dual gate GaAs m.e.s.f.e.t.s. Circuits time behaviour of input, output signals are shown.