作者: Ramon S. Co
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摘要: Multi-phase clocks are used to encode and decode signals that phase-modulated. The input signal is phase-compared with a feedback clock. Phase differences increment or decrement an up/down counter. count value from the counter applied phase rotator, which selects one clock bank of multi-phase clocks. have same frequency, but offset in each other. An output divider divides selected generate phase-modulated output. A fixed-phase analog digital front-end may be convert inputs counter, multiple bits as assignments. For de-modulator, digital-to-analog converter (DAC) decoder produces final