Small size low noise amplifier with suppressed noise from gate resistance
作者： Ickhyun Song , Hee‐Sauk Jhon , Hakchul Jung , Minsuk Koo , Hyungcheol Shin
DOI: 10.1002/MOP.23702
关键词:
摘要: In this article, design and characterization results of a fully integrated 5.8 GHz low noise amplifier (LNA) using 0.13-μm CMOS technology are presented. Commonly adopted inductive source degeneration for input impedance matching is eliminated to achieve smaller chip area while providing reasonable 50-Ω matching. Also by adding capacitor between the gate transistor, from resistance partly suppressed. The layout designed LNA occupies total 0.68 mm2 show forward power gain (S21) 12.7 dB figure 3.9 consuming 6.85 mW 1.2-V DC supply. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 2300–2304, 2008; Published online in InterScience (www.interscience.wiley.com).DOI 10.1002/mop.23702
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