作者: J. Becker , M. Herz , U. Nageldinger , R. W. Hartenstein
DOI: 10.1007/978-0-387-35311-1_18
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摘要: This paper presents a new general purpose accelerator based on the Kress ALU Array III (KrAA-III) — novel field programmable array (FPAA), which efficiently supports high performance arithmetic computations by massive pipelining. The KrAA-III and its underlying concepts will be introduced as generalization of systolic structural principles illustrated simple real world computing example. To explain this approach for embedded accelerators machine paradigm, having been published earlier, is recalled far needed comprehensibility.