作者: Norimitsu Sako
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摘要: A logic circuit combines a plurality of pass-transistor trees and multiple-input gate for receiving intermediate signals from the respective trees, can express complex logical operation while decreasing number stages in improving speed. Even that cannot be expressed efficiently by known or conventional with performance higher than CMOS circuit. Furthermore, when static feedthrough current is suppressed, power consumption reduced. In some embodiments, since circuitry suppressing arranged so probability occurrence collision preceding stage will decrease nil, further