A wideband 10-bit, 20 Msps pipelined ADC using current-mode signals
作者： P. Real , D.H. Robertson , C.W. Mangelsdorf , T.L. Tewksbury
DOI: 10.1109/4.90063
关键词:
摘要: A 10-b BiCMOS analog-to-digital converter (ADC) is used to demonstrate a current-mode pipeline system that overcomes some of the limitations high-speed multiple-flash architectures. Although multistage ADCs are efficient in both die area and power, track-and-hold amplifier (T/H) required prevent input from changing while conversion taking place. If ADC pipelined (operating on more than one sample at time), T/H between each stage. Additionally, for resolution greater about 8 b interstage amplification required. The settling behavior T/Hs amplifiers dominates performance these ADCs. To address problems, differential architecture incorporates T/Hs, obviating need amplifiers. prototype chip achieves 10 20 Msample/s with an 80-MHz bandwidth dissipates 1 W. >
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sci-hub.se 参考文章(8)
J. Fernandes, S.R. Lewis, A.M. Mallinson, G.A. Miller, A 14-bit 10- mu s subranging A/D converter with S/H IEEE Journal of Solid-state Circuits. ,vol. 23, pp. 1309- 1315 ,(1988) , 10.1109/4.90026
A.G.F. Dingwall, V. Zazzu, An 8-MHz CMOS subranging 8-bit A/D converter IEEE Journal of Solid-state Circuits. ,vol. 20, pp. 1138- 1143 ,(1985) , 10.1109/JSSC.1985.1052451
S.H. Lewis, P.R. Gray, A pipelined 5-Msample/s 9-bit analog-to-digital converter IEEE Journal of Solid-State Circuits. ,vol. 22, pp. 954- 961 ,(1987) , 10.1109/JSSC.1987.1052843
T. Shimizu, M. Hotta, K. Maio, S. Ueda, A 10-bit 20-MHz two-step parallel A/D converter with internal S/H IEEE Journal of Solid-state Circuits. ,vol. 24, pp. 13- 20 ,(1989) , 10.1109/4.16296
C. Lane, A 10-bit 60 Msps flash ADC bipolar circuits and technology meeting. pp. 44- 47 ,(1989) , 10.1109/BIPOL.1989.69457
S. Sutarja, P.R. Gray, A pipelined 13-bit 250-ks/s 5-V analog-to-digital converter IEEE Journal of Solid-state Circuits. ,vol. 23, pp. 1316- 1323 ,(1988) , 10.1109/4.90027
M. Ishikawa, T. Tsukahara, An 8-bit 50-MHz CMOS subranging A/D converter with pipelined wide-band S/H IEEE Journal of Solid-state Circuits. ,vol. 24, pp. 1485- 1491 ,(1989) , 10.1109/4.44983
J.A. Schoeff, An inherently monotonic 12 bit DAC international solid-state circuits conference. ,vol. 14, pp. 904- 911 ,(1979) , 10.1109/JSSC.1979.1051296