作者: N. Sirisantana , L. Wei , K. Roy
关键词:
摘要: Power optimization has become an important issue for high performance designs. One way to achieve low-power and circuits is use dual-threshold voltages. High threshold transistors can be used in non-critical paths reduce the leakage power, while lower voltage critical path(s) performance. This paper proposes two low power CMOS design techniques-multiple channel length (M/sub L/CMOS) multiple oxide thickness ox/CMOS), based on dual V/sub th/, technique. A comprehensive algorithm selecting assigning optimal transistor voltage, given. The simulation results ISCAS benchmark show that total consumption reduced by 21% M/sub L/CMOS at activity. Total savings ox/CMOS switching activities are about 42% 24%, respectively.